CS302 FINAL TERM MCQS 2023

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Created on July 04, 2023 By Dilawar

CS302 Final term important mcqs 2023

1 / 20

Flip flops are also called____

Bi-stable dualvibrators

Bi-stable transformer

Bi-stable multivibrators

2 / 20

A frequency counter_____

Counts pulse width

Counts no. of clock pulses in 1 second

Counts high and low range of given clock pulse

3 / 20

_____is used to simplify the circuit that determines the next state.

Next state table

State reduction

State assignment

4 / 20

In a state diagram, the transition from a current state to the next state is determined by

Current state and the inputs

Current state and outputs

Previous state and inputs

5 / 20

____is one of the examples of synchronous inputs.

J-K input

EN input

Preset input (PRE)

6 / 20

Addition of two octal numbers “36” and “71” results in____

213

123

127

7 / 20

Stack is an acronym for ___

FIFO memory

LIFO memory

Flash Memory

8 / 20

The three fundamental gates are______

OR, AND, NAND

NOT, NOR, XOR

NOT, OR, AND

9 / 20

A Nibble consists of ____bits

2

4

8

10 / 20

The voltage gain of the Inverting Amplifier is given by the relation_____

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Vout / Vin = – Rf / Ri

Vout / Rf = – Vin / Ri

Rf / Vin = – Ri / Vout

11 / 20

Excess-8 code assigns to _____“-8”

1100

1000

0000

12 / 20

In NOR gate based S-R latch if both S and R inputs are set to logic 0, the previous output state is
maintained.

True

false

13 / 20

In a sequential circuit the next state is determined by ____and____

State variable, current state

Current state, flip-flop output

Current state and external input

14 / 20

A 8-bit serial in / parallel out shift register contains the value “8”____, clock signal(s) will be required
to shift the value completely out of the register.

2

4

8

15 / 20

In asynchronous transmission when the transmission line is idle,_____

It is set to logic low

It is set to logic high

Remains in previous state

16 / 20

A decade counter is_____

Mod-5 counter

Mod-8 counter

Mod-10 counter

17 / 20

The ____ input overrides the ____ input

Asynchronous, synchronous

Synchronous, asynchronous

Preset input (PRE), Clear input (CLR)

18 / 20

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_____is said to occur when multiple internal variables change due to change in one input variable
Clock Skew

Clock Skew

Race condition

Hold delay

19 / 20

74HC163 has two enable input pins which are ___and____

ENP, ENT

ENI, ENC

ENP, ENC

20 / 20

The minimum time for which the input signal has to be maintained at the input of flip-flop is called
of the flip-flop.

Set-up time

Hold time

Pulse Interval time

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The average score is 66%

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