CS302 FINAL TERM LIVE QUIZ 23/24 February 20, 2023 by Dilawar 130 Created on February 20, 2023 By Dilawar CS302 LIVE QUIZ FINAL TERM 23/24 1 / 21 The total amount of memory that is supported by any digital system depends upon _ ► The organization of memory The structure of memory The size of decoding unit The size of the address bus of the microprocessor 2 / 21 The three fundamental gates are ___________ AND, NAND, XOR OR, AND, NAND NOT, NOR, XOR NOT, OR, AND 3 / 21 LUT is acronym for _________ Look Up Table Local User Terminal Least Upper Time Period None of given options 4 / 21 The voltage gain of the Inverting Amplifier is given by the relation ________ Vout / Vin = - Rf / Ri Vout / Rf = - Vin / Ri Rf / Vin = - Ri / Vout Rf / Vin = Ri / Vout 5 / 21 Excess-8 code assigns _______ to “-8” 1110 1100 1000 0000 6 / 21 A Nibble consists of _____ bits 2 4 8 16 7 / 21 In asynchronous transmission when the transmission line is idle, _________ It is set to logic low It is set to logic high Remains in previous state State of transmission line is not used to start transmission 8 / 21 A decade counter is __________. Mod-3 counter Mod-5 counter Mod-8 counter Mod-10 counter 9 / 21 The _____________ input overrides the ________ input Asynchronous, synchronous Synchronous, asynchronous Preset input (PRE), Clear input (CLR) Preset input (PRE), Clear input (CLR) 10 / 21 ___________ is said to occur when multiple internal variables change due to change in one input variable Clock Skew Race condition Hold delay Hold and Wait 11 / 21 74HC163 has two enable input pins which are _______ and _________ ENP, ENT ENI, ENC ENI, ENC ENT, ENI 12 / 21 In NOR gate based S-R latch if both S and R inputs are set to logic 0, the previous output state is maintained. Set-up time Hold time Pulse Interval time Pulse Stability time (PST) 13 / 21 In NOR gate based S-R latch if both S and R inputs are set to logic 0, the previous output state is maintained. True False 14 / 21 The divide-by-60 counter in digital clock is implemented by using two cascading counters: Mod-6, Mod-10 Mod-50, Mod-10 Mod-10, Mod-50 Mod-50, Mod-6 15 / 21 A 8-bit serial in / parallel out shift register contains the value “8”, _____ clock signal(s) will be required to shift the value completely out of the register. State variable, current state Current state, flip-flop output Current state and external input Input and clock signal applied 16 / 21 A 8-bit serial in / parallel out shift register contains the value “8”, _____ clock signal(s) will be required to shift the value completely out of the register. 1 4 8 7 17 / 21 Which of the following statement is correct about find(x) operation: A find(x) on element x is performed by returning exactly the same node that is found. A find(x) on element x is performed by returning the root of the tree containing x. A find(x) on element x is performed by returning the root of the tree containing x. A find(x) on element x is performed by returning the root of the tree containing x. 18 / 21 Suppose you implement a Min heap (with the smallest element on top) in an array. Consider the different arrays below; determine the one that cannot possibly be a heap: 16, 18, 20, 22, 24, 28, 30 16, 20, 18, 24, 22, 30, 28 16, 24, 18, 28, 30, 20, 22 16, 24, 20, 30, 28, 18, 22 19 / 21 Suppose that a selection sort of 100 items has completed 42 iterations of the main loop. How many items are now guaranteed to be in their final spot (never to be moved again ) 21 42 41 43 20 / 21 If the bottom level of a binary tree is NOT completely filled, depicts that the tree is NOT a Expression tree Threaded binary tree complete Binary tree Perfectly complete Binary tree 21 / 21 What is the best definition of a collision in a hash table? Two entries are identical except for their keys. Two entries with different data have the exact same key Two entries with different keys have the same exact hash value. Two entries with the exact same key have different hash values Your score is The average score is 54% LinkedIn Facebook Twitter VKontakte 0% Restart quiz